
2002 Microchip Technology Inc.
Preliminary
DS30485A-page 157
PIC18FXX39
FIGURE 16-22:
I2C MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
P
9
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
S
A7
A6
A5
A4
A3
A2
A1
SDA
SCL
12
3
4
5
6
7
8
9
12
3
4
5
67
8
9
12
3
4
B
u
sM
aster
ter
m
inate
s
tra
n
sfer
AC
K
Re
ce
ivin
g
Da
ta
fr
o
m
Sl
av
e
Re
ce
ivin
gDa
ta
fr
om
Sla
ve
D0
D1
D2
D3
D4
D5
D6
D7
ACK
R/W
=
1
T
ra
n
smi
tA
ddr
ess
to
S
lave
SSPI
F
BF
AC
K
is
not
sent
W
rit
e
to
SS
PCO
N
2
<
0
>
(SEN
=
1
)
W
ri
te
to
S
P
B
U
F
occu
rs
her
e
A
C
K
fr
o
m
Sl
a
ve
M
a
ster
confi
gured
as
a
r
e
cei
ver
by
pro
g
ram
m
in
g
S
P
C
ON
2<
3>
,(R
C
E
N
=
1)
PE
N
b
it=
1
w
ri
tte
n
her
e
D
a
ta
sh
ifted
in
o
n
fal
ling
edge
o
fC
L
K
C
lear
ed
in
so
ftw
are
S
tart
X
M
IT
SEN
=
0
SSPO
V
SDA
=
0
,SCL
=
1
wh
ile
CP
U
(S
S
PST
A
T
<0
>)
AC
K
La
st
bit
is
shifte
dinto
S
P
S
R
an
d
con
tent
sar
e
unl
oa
ded
in
to
S
P
B
U
F
Cle
a
re
d
in
so
ftw
ar
e
C
lea
re
di
n
s
o
ft
w
ar
e
S
et
S
P
IF
in
terr
upt
at
en
d
of
r
e
cei
ve
Se
tP
b
it
(SSP
ST
A
T
<4
>)
a
nd
SS
PI
F
Cle
a
re
d
in
soft
w
ar
e
A
C
K
fro
m
Ma
ster
Se
tSS
PI
F
a
te
nd
S
e
tS
S
P
IF
inter
rup
t
at
end
o
fA
cknow
ledge
se
quence
Se
tSS
PI
F
in
te
rr
u
p
t
at
e
n
d
of
A
ckno
w
-
le
dge
seque
nce
of
r
e
ceive
S
e
tA
C
K
E
N
,st
ar
tA
cknow
ledg
e
sequ
ence
S
P
O
V
is
set
beca
u
se
S
SPB
UF
is
still
fu
ll
S
D
A
=
ACK
D
T
=
1
RCEN
cle
a
re
d
au
tom
a
tically
RCEN
=
1
st
a
rt
ne
xt
r
e
ce
ive
W
rite
to
S
P
C
ON2<
4>
to
st
ar
tA
cknow
ledge
seque
n
ce
SD
A
=
ACK
D
T
(
SSP
CO
N2
<5
>)
=
0
RCEN
cle
a
re
d
au
tom
a
tically
re
spon
ds
to
S
P
IF
ACKEN
Be
g
in
ST
AR
T
Co
nd
itio
n
C
lear
ed
in
so
ftw
are
SDA
=
A
C
KDT
=
0